This invention relates to a technique that represents a network with an equivalent circuit, and more particularly to a technique that represents an equivalent circuit with few components with an accuracy secured.
Accompanied with the tendency to a higher speed in the LSI operational frequency, there emerges a problem of (EMI) Electro Magnetic Interference, that electronic equipment incorporating such a high speed LSI gives radiation and conduction noises to the other electronic equipment. Efforts to solve this EMI problem have been made for a measure that suppresses radiation noises and/or reduces conduction noises, individually to prototypes and products by means of a trial-and-error method. However, such a symptomatic measure invites an increase of product development cost and an extension of development term, which leads to lowering a competitive power against products of other companies. Thus, there arises a necessity of a design system, whereby suppressing the radiation noises and reducing the conduction noises can be taken into consideration at the design stage of a product.
The radiation and conduction noises are created due to high frequency currents generated by high-speed switching operations of an LSI. As shown in FIG. 3A, high frequency currents generated inside an LSI 110 propagate into a power supply/GND layer 120 of a PCB 100 and a power supply cable 130, which produces conduction noises CN. And, the high frequency currents radiate electromagnetic waves through a resonance of the power supply/GND layer 120 by the conduction noises CN and an antenna function of the power supply cable 130 itself. The electromagnetic waves present radiation noises RN. Therefore, to design electronic equipment in consideration for suppressing the conduction noises and radiation noises, there arises a necessity of a predictive technique for evaluating with high accuracy the high frequency currents that propagate into the PCB during the operation of an LSI.
Generally, the predictive evaluation of the high frequency currents that propagate into the PCB during the operation of an LSI employs a method by a circuit analysis. This method reproduces the electric characteristics (current and voltage waveforms, etc.) of electronic equipment in the operational state of an LSI by means of a computer simulation, and specifies a location that will give a problem of EMI. This inevitably requires a modeling technique for a PCB equivalent circuit, which reproduces the electric characteristics in the operational state of an LSI with high accuracy.
Now, an equivalent circuit creating technique by the inductance (L) and resistance (R) will be explained with an example of the PEEC “Partial Element Equivalent Circuit” method that is the equivalent circuit creating method. FIG. 2 illustrates a workflow for creating an equivalent circuit by the PEEC method. According to this workflow, a PCB equivalent circuit is created. The equivalent circuit is created by means of a computer.
Step S101 receives an input to the computer regarding the geometry and material information of a PCB conductor. Here, the PCB includes insulating layers such as a glass epoxide. The input here receives only the shape information of the conductor.
FIG. 3B illustrates a geometry of only the conductor of the PCB that received the input. The PCB in FIG. 3B has a size of 100 mm×100 mm, conductor thickness of 35?m, material of Cu, and double layer structure with the interlayer 1 mm. A first layer 120a and a second layer 120b have individually four, totally eight circuit connection terminals T1 through T8.
Step S102 creates mesh data from the conductor geometry data. FIG. 4 illustrates the mesh data created from the PCB conductor geometry data in FIG. 3B. If the influence of the skin effect is disregarded, the currents will flow uniformly in the thickness direction of the conductor. Accordingly FIG. 4 illustrates a state that the PCB conductor is approximated into two-dimensional planes 220a and 220b, by ignoring the thickness thereof, and the mesh data are created by means of triangular elements 221.
Step S103 defines a network of an equivalent circuit, and calculates resistors (R) and inductances (L) of each branches, and mutual inductances (M) between inductors. The PEEC method sets a node (N) at the center of a triangular mesh, and defines a network so as to connect the node and the nodes at the centers of the three triangular meshes adjoining to the node. Each branch of the network includes a series connection of R and L, and a mutual inductance (M) between the inductances (L). FIG. 5 illustrates this network. Table 1 illustrates the number of nodes and the number of branches in the mesh data in FIG. 4. The step calculates the resistance (R), inductance (L), and mutual inductance (M) between inductors each, with regard to each of the branches in the network. The calculation of R, L, M is disclosed in detail in the ‘Practical Simulation of PRINTED CIRCUIT BOARD and related structures’ written by K. J. Scott, published by RESERCH STUDIES PRESS LTD., England.
TABLE 1Number of Nodes and Branches in the Mesh Data in FIG. 4Number of Nodes1605Number of Branches4569
Step S104 synthesizes R, L, and M between inductors each that are calculated to each branches in the network into a network. FIG. 6 illustrates a network composed of R, L, M, being calculated to the PCB in FIG. 3 and FIG. 4. FIG. 6 illustrates a state that the branches are reduced from the total network in order to grasp it easily. As shown in FIG. 6, the network includes plural intermediate nodes N other than the circuit connection terminals T1 though T8, and forms a matrix-type connection with the branches SC having R and L connected in series, which is a model that reproduces the shape of the PCB conductor. Table 2 illustrates the number of R, L, M that constitute the equivalent circuit to the PCB in FIG. 3B.
TABLE 2Number of R, L, M Constituting the PCBEquivalent Circuit in FIG. 3 and FIG. 4R4569L4569M20875761
Step S105 outputs the equivalent circuit, in accordance with the data format of the circuit analysis software. FIG. 7 illustrates a part of data when the equivalent circuit to the PCB in FIG. 3B is outputted in accordance with the data format of the universal circuit analysis software SPICE. FIG. 7 illustrates four kinds of data Dt1 through Dt4. The data Dt1 represents the names of the circuit connection terminals, and the last numbers indicate the PCB terminal numbers as shown in FIG. 3B. FIG. 7 shows an example that includes 6 terminals. Dt2 represents the data of voltage sources for the current reference. Dt3 represents the data of the resistances R and inductances L to each of the branches in the network. This case includes the data number of R: 4569 and the data number of L: 4569. Dt4 represents the data of the mutual inductances M between the inductances L in the network. This case includes the data number of M: 2087561.
The predictive evaluation of the high frequency currents that propagate into a PCB during the operation of an LSI involves integrating a device model of an LSI and so forth into a PCB equivalent circuit model, and executes a simulation based on the circuit analysis. The circuit analysis employs the node analysis method. This method is to solve a conductance relational expression with each nodal voltage regarded as an unknown quantity. The conductance relational expression is shown in the expression (101).                                           [            G            ]                    ⁡                      [                                                                                V                    1                                                                                                                    V                    2                                                                                                ⋮                                                                                                  V                    n                                                                        ]                          =                              [                                                                                I                    1                                                                                                                    I                    2                                                                                                ⋮                                                                                                  I                    n                                                                        ]                    ⁢                      (                          G              ⁢                              :                            ⁢                                                           ⁢              n              ×              n              ⁢                                                           ⁢              matrix                        )                                              (        101        )            
Here, n signifies the number of nodes in the network, G signifies a n×n conductance matrix, and V1 through Vn and I1 through In each signify nodal voltages and nodal currents. When a computer solves this equation, at least the computer has to be provided with a memory capacity to store n pieces of nodal voltages and n×n pieces of the conductance matrix. In case of the network in FIG. 6, the total number of the elements in the nodal voltages and the conductance matrix 1 is 2577630. To store all of them with the single-precision type real number requires the memory capacity of 10310520 bytes (about 10 Mbytes).
In a complicatedly formed PCB as used in practical electronic equipment, if the equivalent circuit is created by means of the conventional technique, it will still more require the number of the meshes for calculating the equivalent circuit, in comparison to the case of the PCB in FIG. 3B. Therefore the number of nodes of the equivalent circuit and the number of branches become enormous. In consequence, the circuit analysis using the conventional technique requires much more memory capacity and analyzing time. If the memory capacity and analyzing time are restricted to a practically available size and period, a complicated modeling with a great number of elements will become impossible. Accordingly, the modeling will have to be a simplified one; the accuracy of analysis will become inferior.